Table of contents: DescriptionParametersMaximum RatingsFeaturesPinout/Connection Diagram Related Models Datasheet
200
2.04125
408.25
• Integrated 600V half-bridge gate driver
• 15.6V zener clamp on Vcc
• True micropower start up
• Tighter initial deadtime control
• Low temperature coefficient deadtime
• Shutdown feature (1/6th Vcc) on CT pin
• Increased undervoltage lockout Hysteresis (1V)
• Lower power level-shifting circuit
• Constant LO, HO pulse widths at startup
• Lower di/dt gate driver for better noise immunity
• Low side output in phase with RT
• Internal 50nsec (typ.) bootstrap diode (IR2153D)
• Excellent latch immunity on all inputs and outputs
• ESD protection on all leads
• Also available LEAD-FREE
| Symbol | Definition | Min. | Max. | Units | |
| VB | High Side Floating Supply Voltage | -0.3 | 625 | V | |
| VS | High Side Floating Supply Offset Voltage | VB - 25 | VB + 0.3 | ||
| VHO | High Side Floating Output Voltage | VS - 0.3 | VB + 0.3 | ||
| VLO | Low Side Output Voltage | -0.3 | VCC + 0.3 | ||
| VRT | RT Voltage | -0.3 | VCC + 0.3 | ||
| VCT | CT Voltage | -0.3 | VCC + 0.3 | ||
| ICC | Supply Current (Note 1) | — | 25 | mA | |
| IRT | RT Output Current | -5 | 5 | ||
| dVs/dt | Allowable Offset Supply Voltage Transient | — | 50 | V/ns | |
| PD | Package Power Dissipation @ TA ≤ +25°C | (8 Lead DIP) | — | 1.0 | W |
| (8 Lead SOIC) | — | 0.625 | |||
| RθJA | Thermal Resistance, Junction to Ambient | (8 Lead DIP) | — | 125 | ℃/W |
| (8 Lead SOIC) | — | 200 | |||
| TJ | Junction Temperature | -55 | 150 | ℃ | |
| TS | Storage Temperature | -55 | 150 | ||
| TL | Lead Temperature (Soldering, 10 seconds) | — | 300 | ||
